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The Analytics Acceleration Blog
Featured Articles
259× Faster! What Microsoft's Award-Winning SIGMOD Paper Says About the Speedata APU
Microsoft's paper "CoddSpeed: Hardware Accelerated Query Processing in Microsoft Fabric" won the Best Industry Paper Award at SIGMOD 2026, one of the top academic conferences in database research. The paper documents Microsoft's multi-year effort to move analytics from CPUs onto hardware accelerators and the Speedata C-200 Analytics Processing Unit (APU) is one of the three coprocessor architectures Microsoft integrated and benchmarked inside its next-generation Fabric archit
Daniela Sztulwark
Jun 113 min read
259× Faster! What Microsoft's Award-Winning SIGMOD Paper Says About the Speedata APU
Microsoft's paper "CoddSpeed: Hardware Accelerated Query Processing in Microsoft Fabric" won the Best Industry Paper Award at SIGMOD 2026, one of the top academic conferences in database research. The paper documents Microsoft's multi-year effort to move analytics from CPUs onto hardware accelerators and the Speedata C-200 Analytics Processing Unit (APU) is one of the three coprocessor architectures Microsoft integrated and benchmarked inside its next-generation Fabric archit
Daniela Sztulwark
Jun 113 min read
Know Your Unknowns: Building Knowledge Bases for Your VLSI Engineering Organization (Practical Rules)
Practical guidelines for making AI coding agents work in real VLSI design environments, skills, context, traceability, and the human-only decisions.
Adi Fuchs
May 123 min read
APU vs. LPU vs. TPU vs. GPU vs. CPU: When to Use Each One
Not every workload belongs on a GPU. From CPUs to APUs, TPUs, and LPUs - five processors, five jobs, and a clear guide to picking the right one for AI, analytics, and inference at scale.
Daniela Sztulwark
May 66 min read
One Chip Can’t Do It All - The New AI Tech Stack
No single processor can handle every AI workload efficiently. Speedata's recap breaks down how CPUs, GPUs, TPUs, LPUs, and APUs each fit into the modern AI infrastructure stack.
Daniela Sztulwark
Apr 147 min read
A Case Study - Post-Training Scheme for AI Assisted Chip Verification: UART-to-AXI Block
A real-world Speedata case study on AI-assisted VLSI verification — how we embedded AI agents into a UVM workflow using a UART-to-AXI bridge with a structured post-training scheme.
Adi Fuchs
Mar 172 min read
Embedding AI in Chip Development: Challenges and Opportunities
RTL is crown-jewel IP, hardware assigns concurrently not sequentially, and most enterprise GenAI pilots are failing. The software AI playbook doesn't transfer to chip design — the training data isn't there, the semantics don't map. Here's what it actually takes to embed AI into chip development workflows.
Adi Fuchs
Mar 66 min read
Webinar Recap: The New Computing Paradigm for Advanced Analytics & AI
CPUs and GPUs weren't built for analytics at scale. See how purpose-built processors for analytics workloads delivers 11x faster Apache Spark performance, with real results from pharma and adtech deployments, and a free Workload Analyzer to test against your own jobs.
Daniela Sztulwark
Dec 10, 20253 min read
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