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VLSI Verification Team Leader

Speedata is modernizing analytics infrastructure with the first purpose-built ASIC processor, the Analytics Processing Unit (APU), for analytics and AI data workloads. Delivering up to 100x faster Apache Spark performance while cutting infrastructure TCO by 90%, the APU executes analytics operations directly in silicon with seamless integration and no code changes.


Job Description


We are looking for highly motivated engineers who love the challenges and the opportunity of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.

Qualifications

  • BSc in Electronics Engineering or Computer Science

  • 10+ Years of industry experience in verification, full chip dev. cycle.

  • 2+ years of experience in leading a team of engineers (including technical and personal mentoring, etc.)

  • Experience with System Verilog and UVM methodology - MUST

Advantages

  • M.Sc. in Electronics Engineering or Computer Science

  • Working experience with Formal verification

  • Scripting skills in Python/Perl/shell

  • Hands-on experience with two or more of the following :

    • PCIE (Gen5 and above).

    • DDR (v4 and above).

    • AMBA protocol family, (inc. AXI4+, ACE/CHI)

    • ARM core architecture.

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